Asurada (MT8192)

Status
Live
3 units live.
SoC and family
MT8192, Asurada, Chromebook
Device type
mt8192-asurada-rev1
Activity
First seen 1 Oct 2025, last seen 29 Oct 2026.
Data as of 30 Oct 2026, 00:19 UTCLast synced:LAVA 30 Oct 2026, 00:19 UTCJenkins 30 Oct 2026, 00:21 UTCS3 export 7 Oct 2026, 09:53 UTC
Evaluations
3,1613,252 attempts, 0 cancelled
Completion
95.8%of 3,252 attemptsComplete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.
Evaluated pass rate
100.0%of 565 evaluations with a verdictFinal attempts that passed, out of pass and code. Lab 2, cancelled 0 and unclassified 44 are shown, never folded in.
Failed after retries
46 of 3,16191 failed first time, 45 passed on retry
Changes with a failed boot on this board
n/aNot available for this range: change lineage exists for the live window only.

Last 12 months

Evaluations per week, stacked by final outcome.

Job level only: 27 Oct 2025 to 27 Feb 2026No data held: 28 Feb 2026 to 28 Feb 2026Job level only: 1 Mar 2026 to 6 Sep 2026Test-case detail: 7 Sep 2026 to 30 Sep 2026Test-case detail: 1 Oct 2026 to 30 Oct 2026
Job-level history: 27 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 30 Oct 2026. 1 day without data.
  • No data held: 28 Feb 2026 to 28 Feb 2026

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Months with no data held are listed under the chart.

  • Evaluations per month
  • Incomplete attempts, % of attempts
  • Failed after retries, % of evaluations
Incidents marked: Lab 17 Sep.
Test-case detail: September 2026 to October 2026.
Job level only: 1 Oct 2025 to 27 Feb 2026No data held: 28 Feb 2026 to 28 Feb 2026Job level only: 1 Mar 2026 to 6 Sep 2026Test-case detail: 7 Sep 2026 to 30 Sep 2026Test-case detail: 1 Oct 2026 to 30 Oct 2026
Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 30 Oct 2026. 1 day without data.
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.

47 of 91 first-attempt failures were on asurada-01; 34 of them passed on another unit.

Unit
Attempts
First-attempt failures
Passed on another unit
Passed on the same unit
Last health check
asurada-01
788
47
34
1
Complete 29 Oct 01:40
asurada-03
1,243
26
6
0
Complete 29 Oct 10:38
asurada-02
1,221
18
4
0
Complete 29 Oct 22:49

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 50 of 1,235 shown.

When
Build
Change
Branch
Attempts
Verdict
1 Oct 22:17
tf-a-builder 2531401
not recorded
Branch not recorded
  1. 03
Pass
1 Oct 21:40
tf-a-builder 2529764
55038/1
feat(el3-spmc): deliver TPM CRB information via hob list
integration
built refs/changes/38/55038/1
  1. 03
Pass
1 Oct 20:52
tf-a-lts2.14-builder 234203
55027/2
build(deps): bump the npm_and_yarn group across 1 directory with 5 updates
lts-v2.14
built refs/changes/27/55027/2
  1. 03
Pass
1 Oct 16:28
tf-a-builder 2527074
53789/8
refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime
integration
built refs/changes/89/53789/8
  1. 03
Pass
1 Oct 14:15
tf-a-builder 2526092
53789/6
refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime
integration
built refs/changes/89/53789/6
  1. 03
Pass
1 Oct 09:09
tf-a-lts2.14-builder 232893
55003/1
build(mbedtls): build with CMake
lts-v2.14
built refs/changes/03/55003/1
  1. 03
Pass
30 Sep 13:28
tf-a-builder 2516503
54106/5
fix(libc): fix memrchr pointer underflow
integration
built refs/changes/06/54106/5
  1. 03
Pass
30 Sep 01:38
tf-a-lts2.10-builder 274257
not recorded
lts-v2.10
  1. 03
Pass
29 Sep 22:45
tf-a-builder 2514100
not recorded
Branch not recorded
  1. 03
Pass
29 Sep 16:04
tf-a-builder 2512351
54944/1
refactor(cpus): separate helper files from cpu implementations
integration
built refs/changes/44/54944/1
  1. 03
Pass
29 Sep 09:55
tf-a-builder 2510317
54939/1
fix(fvp): enable FIRME attestation with RMM
integration
built refs/changes/39/54939/1
  1. 03
Pass
28 Sep 22:41
tf-a-builder 2508033
not recorded
Branch not recorded
  1. 03
Pass
28 Sep 14:12
tf-a-builder 2503733
not recorded
Branch not recorded
  1. 03
Pass
28 Sep 11:44
tf-a-builder 2502058
54903/2
fix(psci): serialize cpu_on entry publication
integration
built refs/changes/03/54903/2
  1. 03
Pass
28 Sep 10:20
tf-a-builder 2498288
not recorded
Branch not recorded
  1. 03
Pass
27 Sep 23:29
tf-a-lts2.14-builder 229059
not recorded
lts-v2.14
  1. 03
Pass
27 Sep 01:34
tf-a-lts2.10-builder 271878
not recorded
lts-v2.10
  1. 03
Pass
27 Sep 00:22
tf-a-lts2.12-builder 329429
not recorded
lts-v2.12
  1. 03
Pass
26 Sep 23:15
tf-a-lts2.14-builder 228079
not recorded
lts-v2.14
  1. 03
Pass
26 Sep 17:50
tf-a-lts2.14-builder 227463
54891/2
chore(deps-dev): Bump commitizen
lts-v2.14
built refs/changes/91/54891/2
  1. 03
Pass
26 Sep 00:23
tf-a-lts2.12-builder 328834
not recorded
lts-v2.12
  1. 03
Pass
25 Sep 23:13
tf-a-lts2.14-builder 224380
not recorded
lts-v2.14
  1. 03
Pass
25 Sep 22:14
tf-a-builder 2489177
not recorded
Branch not recorded
  1. 03
Pass
25 Sep 15:02
tf-a-builder 2488168
54860/3
refactor(cpus): rename Canyon to C2-Ultra
integration
built refs/changes/60/54860/3
  1. 03
Pass
25 Sep 12:23
tf-a-lts2.8-builder 210978
54812/4
fix(mediatek): enable missing Cortex-A78 errata for MT8195
lts-v2.8
built refs/changes/12/54812/4
  1. 03
Pass
25 Sep 10:13
tf-a-lts2.8-builder 209411
54812/3
fix(mediatek): enable missing Cortex-A78 errata for MT8195
lts-v2.8
built refs/changes/12/54812/3
  1. 03
Pass
25 Sep 09:34
tf-a-builder 2484327
54860/1
refactor(cpus): rename Canyon to C2-Ultra
integration
built refs/changes/60/54860/1
  1. 03
Pass
25 Sep 09:05
tf-a-builder 2482511
54859/1
fix(cpufeat): remove the `sev` from spin_unlock()
integration
built refs/changes/59/54859/1
  1. 03
Pass
25 Sep 08:22
tf-a-builder 2481841
54136/4
fix(el3-runtime): harden against sysreg accesses targeting XZR
integration
built refs/changes/36/54136/4
  1. 03
Pass
25 Sep 07:33
tf-a-builder 2480447
54843/1
fix(delay-timer): count timeouts in the configured frequency
integration
built refs/changes/43/54843/1
  1. 03
Pass
25 Sep 05:32
tf-a-builder 2479896
54848/1
docs(qti): add Arduino VENTUNO Q documentation
integration
built refs/changes/48/54848/1
  1. 03
Pass
25 Sep 02:29
tf-a-lts2.8-builder 208420
not recorded
lts-v2.8
  1. 03
Pass
24 Sep 23:34
tf-a-lts2.14-builder 223812
not recorded
lts-v2.14
  1. 03
Pass
24 Sep 23:12
tf-a-lts2.8-builder 207532
54812/2
fix(mediatek): enable missing Cortex-A78 errata for MT8195
lts-v2.8
built refs/changes/12/54812/2
  1. 03
Pass
24 Sep 23:03
tf-a-lts2.8-builder 207103
54807/3
fix(fdt-wrappers): reject negative cell counts
lts-v2.8
built refs/changes/07/54807/3
  1. 03
Pass
24 Sep 22:53
tf-a-lts2.8-builder 206614
54807/3
fix(fdt-wrappers): reject negative cell counts
lts-v2.8
built refs/changes/07/54807/3
  1. 03
Pass
24 Sep 16:23
tf-a-lts2.8-builder 205720
54812/1
fix(mediatek): enable missing Cortex-A78 errata for MT8195
lts-v2.8
built refs/changes/12/54812/1
  1. 03
Pass
24 Sep 15:37
tf-a-lts2.8-builder 204110
54807/1
fix(fdt-wrappers): reject negative cell counts
lts-v2.8
built refs/changes/07/54807/1
  1. 03
Pass
24 Sep 14:54
tf-a-lts2.8-builder 202867
54799/1
fix(qti): harden mem_assign parameter handling
lts-v2.8
built refs/changes/99/54799/1
  1. 03
Pass
24 Sep 09:25
tf-a-builder 2475356
54022/4
feat(smc-validation): make NS range hook a mandatory porting interface
integration
built refs/changes/22/54022/4
  1. 03
Pass
23 Sep 23:17
tf-a-lts2.14-builder 222250
not recorded
lts-v2.14
  1. 03
Pass
23 Sep 16:53
tf-a-builder 2472642
54787/1
fix(build): add a default value for XLAT_TABLES_LIB_V2
integration
built refs/changes/87/54787/1
  1. 03
Pass
23 Sep 15:22
tf-a-builder 2471155
54783/1
fix(build): move DSU flags to Makefile
integration
built refs/changes/83/54783/1
  1. 03
Pass
23 Sep 08:24
tf-a-builder 2461519
54022/3
feat(smc-validation): make NS range hook a mandatory porting interface
integration
built refs/changes/22/54022/3
  1. 03
Pass
23 Sep 01:32
tf-a-lts2.10-builder 268716
not recorded
lts-v2.10
  1. 03
Pass
23 Sep 00:32
tf-a-lts2.12-builder 326077
not recorded
lts-v2.12
  1. 03
Pass
22 Sep 16:08
tf-a-builder 2449281
not recorded
Branch not recorded
  1. 03
Pass
21 Sep 23:40
tf-a-lts2.14-builder 220128
not recorded
lts-v2.14
  1. 03
Pass
21 Sep 15:44
tf-a-builder 2442045
54479/1
fix(cpus): add workarounds for C1-Pro errata 3679375 and 3806276
integration
built refs/changes/79/54479/1
  1. 03
Pass
21 Sep 14:39
tf-a-builder 2440614
53839/4
fix: remove SPM_MM
integration
built refs/changes/39/53839/4
  1. 03
Pass
Show the next 50

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 18 health checks failed in the last 7 days.
All passed
Showing the latest 18 checks.
One tick per health check, oldest to newest. Each opens its job.PassedFailedCancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures