Corsola (MT8186)

Status
Live
3 units live.
SoC and family
MT8186, Corsola, Chromebook
Device type
mt8186-corsola-tentacruel
Activity
First seen 1 Oct 2025, last seen 29 Oct 2026.
Data as of 29 Oct 2026, 18:19 UTCLast synced:LAVA 29 Oct 2026, 18:19 UTCJenkins 29 Oct 2026, 18:22 UTCS3 export 7 Oct 2026, 09:53 UTC
Evaluations
261262 attempts, 0 cancelled
Completion
99.6%of 262 attemptsComplete out of complete and incomplete attempts. Cancelled attempts are listed, never counted.
Evaluated pass rate
100.0%of 261 evaluations with a verdictFinal attempts that passed, out of pass and code. Lab 0, cancelled 0 and unclassified 0 are shown, never folded in.
Failed after retries
0 of 2611 failed first time, 1 passed on retry
Changes with a failed boot on this board
0 of 108Allow-CI+2 for TF-A; linked TF-M runs. 0 with no boot verdict. Linked to a change: 46.7% of 261 evaluations

Last 30 days

Evaluations per day, stacked by final outcome.

Test-case detail: 30 Sep 2026 to 30 Sep 2026Test-case detail: 1 Oct 2026 to 29 Oct 2026
Test-case detail: 30 Sep 2026 to 29 Oct 2026. 0 days without data.

History by month

Before the live window we know whether each attempt completed and how retries ended, not why it failed or which change it was. Months with no data held are listed under the chart.

  • Evaluations per month
  • Incomplete attempts, % of attempts
  • Failed after retries, % of evaluations
Incidents marked: Lab 17 Sep.
Test-case detail: September 2026 to October 2026.
Job level only: 1 Oct 2025 to 27 Feb 2026No data held: 28 Feb 2026 to 28 Feb 2026Job level only: 1 Mar 2026 to 6 Sep 2026Test-case detail: 7 Sep 2026 to 30 Sep 2026Test-case detail: 1 Oct 2026 to 29 Oct 2026
Job-level history: 1 Oct 2025 to 6 Sep 2026. Test-case detail: 7 Sep 2026 to 29 Oct 2026. 1 day without data.
  • No data held: 28 Feb 2026 to 28 Feb 2026

Units

CI attempts per physical unit, retries included. Passing on another unit can help identify a unit fault. Health checks are fleet health.

1 of 1 first-attempt failures were on corsola-03; 1 of them passed on another unit.

Unit
Attempts
First-attempt failures
Passed on another unit
Passed on the same unit
Last health check
corsola-03
86
1
1
0
Complete 29 Oct 15:25
corsola-01
82
0
0
0
Complete 29 Oct 10:40
corsola-02
94
0
0
0
Complete 29 Oct 01:34

Evaluations

One row per builder build on this board, newest first, with every attempt. CI runs only; 36 of 86 shown.

When
Build
Change
Branch
Attempts
Verdict
9 Oct 12:00
tf-a-lts2.10-builder 282395
55232/1
chore(fvp): bump maximum permitted Trusted SRAM size
lts-v2.10
built refs/changes/32/55232/1
  1. 03
Pass
9 Oct 09:54
tf-a-builder 2568661
55227/1
refactor(cpus): move C support files into the helpers directory
integration
built refs/changes/27/55227/1
  1. 03
Pass
9 Oct 08:14
tf-a-builder 2567693
55227/1
refactor(cpus): move C support files into the helpers directory
integration
built refs/changes/27/55227/1
  1. 03
Pass
9 Oct 06:51
tf-a-builder 2566993
not recorded
master
  1. 03
Pass
9 Oct 00:38
tf-a-lts2.12-builder 339455
not recorded
lts-v2.12
  1. 03
Pass
8 Oct 22:26
tf-a-builder 2565330
not recorded
master
built integration
  1. 03
Pass
8 Oct 21:28
tf-a-builder 2564438
not recorded
master
built integration
  1. 03
Pass
8 Oct 17:21
tf-a-lts2.10-builder 281299
55220/1
fix(fvp): absorb BUILD_CPUS_WITH_NO_FVP_MODEL and ENABLE_ERRATA_ALL cores
lts-v2.10
built refs/changes/20/55220/1
  1. 03
Pass
8 Oct 08:47
tf-a-lts2.14-builder 242184
55214/2
refactor(cpus): rename Canyon to C2-Ultra
lts-v2.14
built refs/changes/14/55214/2
  1. 03
Pass
8 Oct 08:18
tf-a-lts2.14-builder 241345
55214/1
refactor(cpus): rename Canyon to C2-Ultra
lts-v2.14
built refs/changes/14/55214/1
  1. 03
Pass
8 Oct 01:16
tf-a-lts2.10-builder 280129
not recorded
lts-v2.10
  1. 03
Pass
7 Oct 23:27
tf-a-lts2.14-builder 240530
not recorded
lts-v2.14
  1. 03
Pass
7 Oct 22:33
tf-a-builder 2560342
not recorded
master
built integration
  1. 03
Pass
7 Oct 12:48
tf-a-builder 2558836
54137/7
fix(cpufeat): correctly match the group 3 ID registers space
integration
built refs/changes/37/54137/7
  1. 03
Pass
6 Oct 20:52
tf-a-builder 2549660
55088/2
fix(psci): run the arch setup before pwr_domain_on_finish()
integration
built refs/changes/88/55088/2
  1. 03
Pass
6 Oct 20:34
tf-a-builder 2549082
54926/2
fix(psci): allow OS-initiated mode while other cores are off
integration
built refs/changes/26/54926/2
  1. 03
Pass
6 Oct 10:11
tf-a-builder 2547399
54944/2
refactor(cpus): separate helper files from cpu implementations
integration
built refs/changes/44/54944/2
  1. 03
Pass
6 Oct 00:33
tf-a-lts2.12-builder 337213
not recorded
lts-v2.12
  1. 03
Pass
5 Oct 11:36
tf-a-builder 2543382
not recorded
master
  1. 03
Pass
5 Oct 07:56
tf-a-builder 2539589
55071/2
refactor(fvp): Update platform token to spec 2.0-bet3
integration
built refs/changes/71/55071/2
  1. 03
Pass
5 Oct 01:25
tf-a-lts2.10-builder 278028
not recorded
lts-v2.10
  1. 03
Pass
5 Oct 00:19
tf-a-lts2.12-builder 336021
not recorded
lts-v2.12
  1. 03
Pass
4 Oct 01:39
tf-a-lts2.10-builder 277436
not recorded
lts-v2.10
  1. 03
Pass
4 Oct 00:25
tf-a-lts2.12-builder 335422
not recorded
lts-v2.12
  1. 03
Pass
3 Oct 23:35
tf-a-lts2.14-builder 237443
not recorded
lts-v2.14
  1. 03
Pass
2 Oct 00:26
tf-a-lts2.12-builder 334138
not recorded
lts-v2.12
  1. 03
Pass
1 Oct 21:48
tf-a-builder 2529973
55038/1
feat(el3-spmc): deliver TPM CRB information via hob list
integration
built refs/changes/38/55038/1
  1. 03
Pass
1 Oct 21:44
tf-a-lts2.14-builder 235220
55027/2
build(deps): bump the npm_and_yarn group across 1 directory with 5 updates
lts-v2.14
built refs/changes/27/55027/2
  1. 03
Pass
1 Oct 20:08
tf-a-builder 2529614
55038/1
feat(el3-spmc): deliver TPM CRB information via hob list
integration
built refs/changes/38/55038/1
  1. 03
Pass
1 Oct 14:20
tf-a-builder 2526238
53789/6
refactor(gpt_rme): split gpt lib to RME init and RME GPT runtime
integration
built refs/changes/89/53789/6
  1. 03
Pass
1 Oct 09:08
tf-a-lts2.14-builder 232923
55003/1
build(mbedtls): build with CMake
lts-v2.14
built refs/changes/03/55003/1
  1. 03
Pass
30 Sep 15:21
tf-a-builder 2519903
54987/1
fix(gpt_rme): remove dependency on bitlocks for FIRME GM service
integration
built refs/changes/87/54987/1
  1. 03
  2. 02
Passed on retry
30 Sep 13:24
tf-a-builder 2516369
54106/5
fix(libc): fix memrchr pointer underflow
integration
built refs/changes/06/54106/5
  1. 03
Pass
30 Sep 10:46
tf-a-builder 2515345
54944/1
refactor(cpus): separate helper files from cpu implementations
integration
built refs/changes/44/54944/1
  1. 03
Pass
30 Sep 01:38
tf-a-lts2.10-builder 274256
not recorded
lts-v2.10
  1. 03
Pass
30 Sep 00:35
tf-a-lts2.12-builder 332054
not recorded
lts-v2.12
  1. 03
Pass

Fleet health

Health checks, not CI results. They never count towards any rate on this page.

0 of 21 health checks failed in the last 7 days.
All passed
Showing the latest 21 checks.
One tick per health check, oldest to newest. Each opens its job.PassedFailedCancelled

Incidents

  1. Lab 17 Sep 2026 to 18 Sep 2026

    LAVA logger DNS failures